There are two independent PCIe controllers in MT2712/MT7622 platform, and each of them should contain an independent MSI domain. In current architecture, MSI domain will be inherited from the root bridge, and all of the devices will share the same MSI domain. Hence that, the PCIe devices will not work properly if the irq number which required is more than 32. Split the PCIe node for MT2712/MT7622 platform to fix MSI issue and comply with the hardware design. change note: v2: change the allocation of mt2712 PCIe MMIO space due to the allcation size is not right in v1. chuanjia.liu (4): dt-bindings: PCI: Mediatek: Update PCIe binding PCI: mediatek: Use regmap to get shared pcie-cfg base arm64: dts: mediatek: Split PCIe node for MT2712/MT7622 ARM: dts: mediatek: Update mt7629 PCIe node .../bindings/pci/mediatek-pcie-cfg.yaml | 38 +++++ .../devicetree/bindings/pci/mediatek-pcie.txt | 144 +++++++++++------- arch/arm/boot/dts/mt7629-rfb.dts | 3 +- arch/arm/boot/dts/mt7629.dtsi | 23 +-- arch/arm64/boot/dts/mediatek/mt2712e.dtsi | 75 +++++---- .../dts/mediatek/mt7622-bananapi-bpi-r64.dts | 16 +- arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts | 6 +- arch/arm64/boot/dts/mediatek/mt7622.dtsi | 68 ++++++--- drivers/pci/controller/pcie-mediatek.c | 25 ++- 9 files changed, 258 insertions(+), 140 deletions(-) create mode 100644 Documentation/devicetree/bindings/pci/mediatek-pcie-cfg.yaml -- 2.18.0
