Hi Jay,
Thank you for reviewing. My comments below:
On 18 Apr 2020, at 1:36, Jay Fang wrote:
On 2020/4/15 8:47, Sean V Kelley wrote:
[1] https://www.computeexpresslink.org/
Signed-off-by: Sean V Kelley <sean.v.kelley@xxxxxxxxxxxxxxx>
---
lib/header.h | 20 +++
+
+static int
+is_cxl_cap(struct device *d, int where)
+{
+ u32 hdr;
+ u16 w;
+
+ if (!config_fetch(d, where + PCI_DVSEC_HEADER1, 8))
+ return 0;
+
+ /* Check for supported Vendor */
+ hdr = get_conf_long(d, where + PCI_DVSEC_HEADER1);
+ w = BITS(hdr, 0, 16);
+ if (w != PCI_VENDOR_ID_INTEL)
I don't think here checking is quite right. Does only Intel support
CXL?
Other Vendors should also be considered.
In the absence of currently available hardware, I was attempting to
limit false positive noise. I’m happy to avoid the check on the
vendor if there were to exist a definitive supported list. Bjorn
suggested that I check for vendor ID with DVSEC ID for now. As hardware
enters the market, I can surely revise this with an update when the CXL
group publishes a list.
Best regards,
Sean
Thanks
+ return 0;
+
+ /* Check for Designated Vendor-Specific ID */
+ hdr = get_conf_long(d, where + PCI_DVSEC_HEADER2);
+ w = BITS(hdr, 0, 16);
+ if (w == PCI_DVSEC_ID)
+ return 1;
+
+ return 0;
+}
+
static void
cap_dvsec(struct device *d, int where)
{
@@ -947,7 +998,10 @@ show_ext_caps(struct device *d, int type)
printf("Readiness Time Reporting <?>\n");
break;
case PCI_EXT_CAP_ID_DVSEC:
- cap_dvsec(d, where);
+ if (is_cxl_cap(d, where))
+ cap_cxl(d, where);
+ else
+ cap_dvsec(d, where);
break;
case PCI_EXT_CAP_ID_VF_REBAR:
printf("VF Resizable BAR <?>\n");
diff --git a/tests/cap-dvsec-cxl b/tests/cap-dvsec-cxl
new file mode 100644
index 0000000..e5d2745
--- /dev/null
+++ b/tests/cap-dvsec-cxl
@@ -0,0 +1,340 @@
+6b:00.0 Unassigned class [ff00]: Intel Corporation Device 0d93
+ Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop-
ParErr+ Stepping- SERR+ FastB2B- DisINTx-
