Re: Problem with PCIe enumeration of Google/Coral TPU Edge module on Linux

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Hi Bjorn,

Thanks for your help.

I've removed all other PCIe devices to make the analysis easier.
The dmesg with the traces can be found at:
https://paste.ubuntu.com/p/W3m2VQCYqg/

Didn't find anything new related to BAR0 or BAR2, in the dmesg,
though. Anyway I'm no expert in this, maybe it can give you some
useful information, still.

Kind Regards,
Luís Mendes

On Mon, Mar 30, 2020 at 8:49 PM Bjorn Helgaas <helgaas@xxxxxxxxxx> wrote:
>
> On Sun, Mar 29, 2020 at 11:11:28PM +0100, Luís Mendes wrote:
> > Hi Nicholas, Bjorn,
> >
> > I was able to make the apex driver work on a X86_64 system with the
> > Coral Edge TPU PCIe device.
> > So, now the PCI enumeration problem is now clearly an ARM and ARM64
> > platform issue. What are the recommended steps for debugging this? I
> > hava a JTAG interface and openOCD supported configuration for it.
>
> Thanks for the work of testing on X86_64.  I don't have any magic
> ideas other than instrumenting the code and slogging through the
> output.  Can you try the patch below and collect the dmesg?  This will
> probably take a few iterations.
>
>




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