On Wed, Feb 26, 2020 at 7:31 PM Lorenzo Pieralisi <lorenzo.pieralisi@xxxxxxx> wrote: > > On Thu, Jan 09, 2020 at 11:28:51AM +0800, Shawn Guo wrote: > > The PCIe reset via GPIO in the driver never worked as expected. Per > > "Power Sequencing and Reset Signal Timings" table in > > PCI EXPRESS CARD ELECTROMECHANICAL SPECIFICATION, the PERST# should be > > deasserted after minimum of 100us once REFCLK is stable. > > > > The assertion has been done when the GPIO is being requested, and > > deassertion should be done in host enabling rather than disabling. Also > > a bit wait is added to ensure device get ready after reset. > > > > Signed-off-by: Shawn Guo <shawn.guo@xxxxxxxxxx> > > --- > > drivers/pci/controller/dwc/pcie-histb.c | 20 ++++++++++++++------ > > 1 file changed, 14 insertions(+), 6 deletions(-) > > Shawn, > > this looks like a fix, please tag it as such and let me know if > it has to be backported, in which case also the previous patch > should I assume. Hi Lorenzo, It is a fix, but we recently realized that the problem needs to be fixed in a way that does not break existing DTB. So please ignore the series for now, and we will try to work out a better one. Sorry that we did not update the thread in time. Shawn
