According the PCI Express base specification when PHY does not meet ZRX-DC specification, after every 100ms timeout the link should transition to recovery state when the link is in low power states. Ports that meet the ZRX-DC specification for 2.5 GT/s while in the L1.Idle state and are therefore not required to implement the 100 ms timeout and transition to Recovery should avoid implementing it, since it will reduce the power savings expected from the L1 state. DesignWare controller provides GEN3_ZRXDC_NONCOMPL field in GEN3_RELATED_OFF to specify about ZRX-DC compliant PHY. We need to get the PHY property in controller driver. So, we are proposing a new method phy_property_present() in the phy driver. PCIe controller platform drivers should populate the phy_zrxdc_compliant flag, which will be used by generic DesignWare driver. pci->phy_zrxdc_compliant = phy_property_present(xxxx_ctrl->phy, "phy-zrxdc-compliant"); Patchset v2 can be found at: - 1/2: https://lkml.org/lkml/2019/11/11/672 - 2/2: https://lkml.org/lkml/2019/10/28/285 Changes w.r.t v2: - Addressed review comments - Rebased on latest linus/master Changes w.r.t v3: - Added linux-pci@xxxxxxxxxxxxxxx as pointed by Gustavo, Sorry for annoying. Changes w.r.t v4: - Addressed review comments from Andrew Murray - Rebased on latest linus/master Anvesh Salveru (2): phy: core: add phy_property_present method PCI: dwc: add support to handle ZRX-DC Compliant PHYs drivers/pci/controller/dwc/pcie-designware.c | 6 ++++++ drivers/pci/controller/dwc/pcie-designware.h | 4 ++++ drivers/phy/phy-core.c | 17 +++++++++++++++++ include/linux/phy/phy.h | 6 ++++++ 4 files changed, 33 insertions(+) -- 2.7.4
