On Mon, Dec 09, 2019 at 11:20:03AM +0800, Dilip Kota wrote: > Intel PCIe is Synopsys based controller. Intel PCIe driver uses > DesignWare PCIe framework for host initialization and register > configurations. > > Changes on v11: > Patches rebase on kernel v5.5-rc1 > > Dilip Kota (3): > dt-bindings: PCI: intel: Add YAML schemas for the PCIe RC controller > PCI: dwc: intel: PCIe RC controller driver > PCI: artpec6: Configure FTS with dwc helper function > > .../devicetree/bindings/pci/intel-gw-pcie.yaml | 138 ++++++ > drivers/pci/controller/dwc/Kconfig | 11 + > drivers/pci/controller/dwc/Makefile | 1 + > drivers/pci/controller/dwc/pcie-artpec6.c | 8 +- > drivers/pci/controller/dwc/pcie-designware.c | 57 +++ > drivers/pci/controller/dwc/pcie-designware.h | 12 + > drivers/pci/controller/dwc/pcie-intel-gw.c | 545 +++++++++++++++++++++ > include/uapi/linux/pci_regs.h | 1 + > 8 files changed, 766 insertions(+), 7 deletions(-) > create mode 100644 Documentation/devicetree/bindings/pci/intel-gw-pcie.yaml > create mode 100644 drivers/pci/controller/dwc/pcie-intel-gw.c Applied to pci/dwc, thanks. Lorenzo
