On Mon, Nov 11, 2019 at 02:43:03AM +0000, George Cherian wrote:
> Enhance the ACS quirk for Cavium Processors. Add the root port
> vendor ID's for ThunderX2 and ThunderX3 series of processors.
>
> Signed-off-by: George Cherian <george.cherian@xxxxxxxxxxx>
> Reviewed-by: Robert Richter <rrichter@xxxxxxxxxxx>
Applied to pci/virtualization for v5.5, thanks!
I added a Fixes: f2ddaf8dfd4a ("PCI: Apply Cavium ThunderX ACS quirk
to more Root Ports") since it refines that patch, and also a stable
tag (like f2ddaf8dfd4a).
> ---
> drivers/pci/quirks.c | 20 +++++++++++++-------
> 1 file changed, 13 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
> index 44c4ae1abd00..19821d5d0ef3 100644
> --- a/drivers/pci/quirks.c
> +++ b/drivers/pci/quirks.c
> @@ -4243,15 +4243,21 @@ static int pci_quirk_amd_sb_acs(struct pci_dev *dev, u16 acs_flags)
>
> static bool pci_quirk_cavium_acs_match(struct pci_dev *dev)
> {
> + if (!pci_is_pcie(dev) || pci_pcie_type(dev) != PCI_EXP_TYPE_ROOT_PORT)
> + return false;
> +
> + switch (dev->device) {
> /*
> - * Effectively selects all downstream ports for whole ThunderX 1
> - * family by 0xf800 mask (which represents 8 SoCs), while the lower
> - * bits of device ID are used to indicate which subdevice is used
> - * within the SoC.
> + * Effectively selects all downstream ports for whole ThunderX1
> + * (which represents 8 SoCs).
> */
> - return (pci_is_pcie(dev) &&
> - (pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT) &&
> - ((dev->device & 0xf800) == 0xa000));
> + case 0xa000 ... 0xa7ff: /* ThunderX1 */
> + case 0xaf84: /* ThunderX2 */
> + case 0xb884: /* ThunderX3 */
> + return true;
> + default:
> + return false;
> + }
> }
>
> static int pci_quirk_cavium_acs(struct pci_dev *dev, u16 acs_flags)
> --
> 2.17.1
>
