On Wed, Aug 07, 2019 at 04:03:52PM +0000, Patel, Mayurkumar wrote:
> This patch provides AER config save and restore capabilities. After system
> resume AER config registers settings are lost. Not restoring AER root error
> command register bits on root port if they were set, disables generation
> of an AER interrupt reported by function as described in PCIe spec r4.0,
> sec 7.8.4.9. Moreover, AER config mask, severity and ECRC registers are
> also required to maintain same state prior to system suspend to maintain
> AER interrupts behavior.
Looks good, trivial comments below.
> Signed-off-by: Mayurkumar Patel <mayurkumar.patel@xxxxxxxxx>
> Signed-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@xxxxxxxxxxxxxxx>
> ---
> drivers/pci/pci.c | 2 ++
> drivers/pci/pcie/aer.c | 70 ++++++++++++++++++++++++++++++++++++++++++++++++++
> include/linux/aer.h | 4 +++
> 3 files changed, 76 insertions(+)
>
> diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
> index 8abc843..40d5507 100644
> --- a/drivers/pci/pci.c
> +++ b/drivers/pci/pci.c
> @@ -1340,6 +1340,7 @@ int pci_save_state(struct pci_dev *dev)
>
> pci_save_ltr_state(dev);
> pci_save_dpc_state(dev);
> + pci_save_aer_state(dev);
> return pci_save_vc_state(dev);
> }
> EXPORT_SYMBOL(pci_save_state);
> @@ -1453,6 +1454,7 @@ void pci_restore_state(struct pci_dev *dev)
> pci_restore_dpc_state(dev);
>
> pci_cleanup_aer_error_status_regs(dev);
> + pci_restore_aer_state(dev);
>
> pci_restore_config_space(dev);
>
> diff --git a/drivers/pci/pcie/aer.c b/drivers/pci/pcie/aer.c
> index b45bc47..fb067dc 100644
> --- a/drivers/pci/pcie/aer.c
> +++ b/drivers/pci/pcie/aer.c
> @@ -448,6 +448,64 @@ int pci_cleanup_aer_error_status_regs(struct pci_dev *dev)
> return 0;
> }
>
> +static inline bool pcie_aer_cap_has_root_command(struct pci_dev *dev)
> +{
> + return pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT ||
> + pci_pcie_type(dev) == PCI_EXP_TYPE_RC_EC;
> +}
Can you use pcie_cap_has_rtctl() here instead of implementing it
again? You'll have to make it non-static, similar to what we did for
pcie_cap_has_lnkctl() in 7a1562d4f2d0 ("PCI: Apply _HPX Link Control
settings to all devices with a link").
> +void pci_save_aer_state(struct pci_dev *dev)
> +{
> + struct pci_cap_saved_state *save_state;
> + u32 *cap;
> + int pos;
> +
> + if (!pci_is_pcie(dev))
> + return;
> +
> + save_state = pci_find_saved_ext_cap(dev, PCI_EXT_CAP_ID_ERR);
> + if (!save_state)
> + return;
> +
> + pos = dev->aer_cap;
> + if (!pos)
> + return;
I think it would make more sense to reorder the above like this:
pos = dev->aer_cap;
if (!pos)
return;
save_state = pci_find_saved_ext_cap(dev, PCI_EXT_CAP_ID_ERR);
...
and you don't need the pci_is_pcie() test since only PCIe devices
implement the AER capability. Same applies below, of course.
> + cap = &save_state->cap.data[0];
> + pci_read_config_dword(dev, pos + PCI_ERR_UNCOR_MASK, cap++);
> + pci_read_config_dword(dev, pos + PCI_ERR_UNCOR_SEVER, cap++);
> + pci_read_config_dword(dev, pos + PCI_ERR_COR_MASK, cap++);
> + pci_read_config_dword(dev, pos + PCI_ERR_CAP, cap++);
> + if (pcie_aer_cap_has_root_command(dev))
> + pci_read_config_dword(dev, pos + PCI_ERR_ROOT_COMMAND, cap++);
> +}
> +
> +void pci_restore_aer_state(struct pci_dev *dev)
> +{
> + struct pci_cap_saved_state *save_state;
> + u32 *cap;
> + int pos;
> +
> + if (!pci_is_pcie(dev))
> + return;
> +
> + save_state = pci_find_saved_ext_cap(dev, PCI_EXT_CAP_ID_ERR);
> + if (!save_state)
> + return;
> +
> + pos = dev->aer_cap;
> + if (!pos)
> + return;
> +
> + cap = &save_state->cap.data[0];
> + pci_write_config_dword(dev, pos + PCI_ERR_UNCOR_MASK, *cap++);
> + pci_write_config_dword(dev, pos + PCI_ERR_UNCOR_SEVER, *cap++);
> + pci_write_config_dword(dev, pos + PCI_ERR_COR_MASK, *cap++);
> + pci_write_config_dword(dev, pos + PCI_ERR_CAP, *cap++);
> + if (pcie_aer_cap_has_root_command(dev))
> + pci_write_config_dword(dev, pos + PCI_ERR_ROOT_COMMAND, *cap++);
> +}
> +
> void pci_aer_init(struct pci_dev *dev)
> {
> dev->aer_cap = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR);
> @@ -455,6 +513,18 @@ void pci_aer_init(struct pci_dev *dev)
> if (dev->aer_cap)
> dev->aer_stats = kzalloc(sizeof(struct aer_stats), GFP_KERNEL);
>
> + /*
> + * Since PCI_ERR_ROOT_COMMAND is only valid for root port and root
> + * complex event collector, as per PCIe 4.0 section 7.8.4, interpret
> + * the device/port type to determine the availability of additional
> + * root port and root complex event collector register.
> + */
> + if (pcie_aer_cap_has_root_command(dev))
> + pci_add_ext_cap_save_buffer(dev, PCI_EXT_CAP_ID_ERR,
> + sizeof(u32) * 5);
> + else
> + pci_add_ext_cap_save_buffer(dev, PCI_EXT_CAP_ID_ERR,
> + sizeof(u32) * 4);
> pci_cleanup_aer_error_status_regs(dev);
> }
>
> diff --git a/include/linux/aer.h b/include/linux/aer.h
> index 514bffa..fa19e01 100644
> --- a/include/linux/aer.h
> +++ b/include/linux/aer.h
> @@ -46,6 +46,8 @@ int pci_enable_pcie_error_reporting(struct pci_dev *dev);
> int pci_disable_pcie_error_reporting(struct pci_dev *dev);
> int pci_cleanup_aer_uncorrect_error_status(struct pci_dev *dev);
> int pci_cleanup_aer_error_status_regs(struct pci_dev *dev);
> +void pci_save_aer_state(struct pci_dev *dev);
> +void pci_restore_aer_state(struct pci_dev *dev);
> #else
> static inline int pci_enable_pcie_error_reporting(struct pci_dev *dev)
> {
> @@ -63,6 +65,8 @@ static inline int pci_cleanup_aer_error_status_regs(struct pci_dev *dev)
> {
> return -EINVAL;
> }
> +static inline void pci_save_aer_state(struct pci_dev *dev) {}
> +static inline void pci_restore_aer_state(struct pci_dev *dev) {}
> #endif
>
> void cper_print_aer(struct pci_dev *dev, int aer_severity,
> --
> 2.7.4
>
>
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