On Wed, Aug 28, 2019 at 10:58:46PM +0530, Vidya Sagar wrote: > Add optional bindings "vpcie3v3-supply" and "vpcie12v-supply" to describe > regulators of a PCIe slot's supplies 3.3V and 12V provided the platform > is designed to have regulator controlled slot supplies. > > Signed-off-by: Vidya Sagar <vidyas@xxxxxxxxxx> Reviewed-by: Andrew Murray <andrew.murray@xxxxxxx> > --- > V3: > * None > > V2: > * None > > .../devicetree/bindings/pci/nvidia,tegra194-pcie.txt | 8 ++++++++ > 1 file changed, 8 insertions(+) > > diff --git a/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie.txt b/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie.txt > index 0ac1b867ac24..b739f92da58e 100644 > --- a/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie.txt > +++ b/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie.txt > @@ -104,6 +104,12 @@ Optional properties: > specified in microseconds > - nvidia,aspm-l0s-entrance-latency-us: ASPM L0s entrance latency to be > specified in microseconds > +- vpcie3v3-supply: A phandle to the regulator node that supplies 3.3V to the slot > + if the platform has one such slot. (Ex:- x16 slot owned by C5 controller > + in p2972-0000 platform). > +- vpcie12v-supply: A phandle to the regulator node that supplies 12V to the slot > + if the platform has one such slot. (Ex:- x16 slot owned by C5 controller > + in p2972-0000 platform). > > Examples: > ========= > @@ -156,6 +162,8 @@ Tegra194: > 0xc2000000 0x18 0x00000000 0x18 0x00000000 0x4 0x00000000>; /* prefetchable memory (16GB) */ > > vddio-pex-ctl-supply = <&vdd_1v8ao>; > + vpcie3v3-supply = <&vdd_3v3_pcie>; > + vpcie12v-supply = <&vdd_12v_pcie>; > > phys = <&p2u_hsio_2>, <&p2u_hsio_3>, <&p2u_hsio_4>, > <&p2u_hsio_5>; > -- > 2.17.1 >
