On Tue, Aug 13, 2019 at 11:37:59AM +0100, André Draszik wrote: > The i.MX7D variant of the IP can use either an external > crystal oscillator input or an internal clock input as > a reference clock input for the PCIe PHY. > > Document the optional property 'fsl,pcie-phy-refclk-internal' > > Signed-off-by: André Draszik <git@xxxxxxxxxx> > Cc: Richard Zhu <hongxing.zhu@xxxxxxx> > Cc: Lucas Stach <l.stach@xxxxxxxxxxxxxx> > Cc: Bjorn Helgaas <bhelgaas@xxxxxxxxxx> > Cc: Rob Herring <robh+dt@xxxxxxxxxx> > Cc: Mark Rutland <mark.rutland@xxxxxxx> > Cc: Shawn Guo <shawnguo@xxxxxxxxxx> > Cc: Sascha Hauer <s.hauer@xxxxxxxxxxxxxx> > Cc: Pengutronix Kernel Team <kernel@xxxxxxxxxxxxxx> > Cc: Fabio Estevam <festevam@xxxxxxxxx> > Cc: NXP Linux Team <linux-imx@xxxxxxx> > Cc: linux-pci@xxxxxxxxxxxxxxx > Cc: linux-arm-kernel@xxxxxxxxxxxxxxxxxxx > Cc: devicetree@xxxxxxxxxxxxxxx > Cc: linux-kernel@xxxxxxxxxxxxxxx > --- > Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt > index a7f5f5afa0e6..985d7083df9f 100644 > --- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt > +++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt > @@ -56,6 +56,11 @@ Additional required properties for imx7d-pcie and imx8mq-pcie: > - "turnoff" > - fsl,imx7d-pcie-phy: A phandle to an fsl,imx7d-pcie-phy node. Not sure how this got in, but why is the phy binding not used here? > > +Additional optional properties for imx7d-pcie: > +- fsl,pcie-phy-refclk-internal: If present then an internal PLL input is used > + as PCIe PHY reference clock source. By default an external ocsillator input > + is used. Can't the clock binding and maybe 'assigned-clocks' be used here? Also, this is a property of the PHY, so it belongs in the PHY's node. Rob
