From: Hou Zhiqiang <Zhiqiang.Hou@xxxxxxx>
There are some 8-bit and 16-bit registers in PCIe configuration
space, so add these accessors accordingly.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@xxxxxxx>
Reviewed-by: Minghuan Lian <Minghuan.Lian@xxxxxxx>
Reviewed-by: Subrahmanya Lingappa <l.subrahmanya@xxxxxxxxxxxxxx>
---
V8:
- No change.
.../pci/controller/mobiveil/pcie-mobiveil.h | 20 +++++++++++++++++++
1 file changed, 20 insertions(+)
diff --git a/drivers/pci/controller/mobiveil/pcie-mobiveil.h b/drivers/pci/controller/mobiveil/pcie-mobiveil.h
index 4f17a9837fe9..8c07f69e0330 100644
--- a/drivers/pci/controller/mobiveil/pcie-mobiveil.h
+++ b/drivers/pci/controller/mobiveil/pcie-mobiveil.h
@@ -182,9 +182,29 @@ static inline u32 csr_readl(struct mobiveil_pcie *pcie, u32 off)
return csr_read(pcie, off, 0x4);
}
+static inline u32 csr_readw(struct mobiveil_pcie *pcie, u32 off)
+{
+ return csr_read(pcie, off, 0x2);
+}
+
+static inline u32 csr_readb(struct mobiveil_pcie *pcie, u32 off)
+{
+ return csr_read(pcie, off, 0x1);
+}
+
static inline void csr_writel(struct mobiveil_pcie *pcie, u32 val, u32 off)
{
csr_write(pcie, val, off, 0x4);
}
+static inline void csr_writew(struct mobiveil_pcie *pcie, u32 val, u32 off)
+{
+ csr_write(pcie, val, off, 0x2);
+}
+
+static inline void csr_writeb(struct mobiveil_pcie *pcie, u32 val, u32 off)
+{
+ csr_write(pcie, val, off, 0x1);
+}
+
#endif /* _PCIE_MOBIVEIL_H */
--
2.17.1
