On Fri, May 17, 2019 at 06:08:41PM +0530, Vidya Sagar wrote: > Add support for Tegra194 P2U (PIPE to UPHY) module block which is a glue > module instantiated one for each PCIe lane between Synopsys DesignWare core > based PCIe IP and Universal PHY block. > > Signed-off-by: Vidya Sagar <vidyas@xxxxxxxxxx> > Reviewed-by: Rob Herring <robh@xxxxxxxxxx> > --- > Changes since [v6]: > * None > > Changes since [v5]: > * Added Sob > * Changed node name from "p2u@xxxxxxxx" to "phy@xxxxxxxx" > > Changes since [v4]: > * None > > Changes since [v3]: > * None > > Changes since [v2]: > * Changed node label to reflect new format that includes either 'hsio' or > 'nvhs' in its name to reflect which UPHY brick they belong to > > Changes since [v1]: > * This is a new patch in v2 series > > .../bindings/phy/phy-tegra194-p2u.txt | 28 +++++++++++++++++++ > 1 file changed, 28 insertions(+) > create mode 100644 Documentation/devicetree/bindings/phy/phy-tegra194-p2u.txt Acked-by: Thierry Reding <treding@xxxxxxxxxx>
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