On Fri, May 17, 2019 at 01:49:49PM +0530, Vidya Sagar wrote: > On 5/16/2019 7:04 PM, Bjorn Helgaas wrote: > > On Tue, May 14, 2019 at 09:00:19AM +0530, Vidya Sagar wrote: > > > On 5/13/2019 12:55 PM, Christoph Hellwig wrote: > > > > On Mon, May 13, 2019 at 10:36:13AM +0530, Vidya Sagar wrote: > > > > > Export pcie_pme_disable_msi() & pcie_pme_no_msi() APIs to enable drivers > > > > > using these APIs be able to build as loadable modules. > > > > > > > > But this is a global setting. If you root port is broken you need > > > > a per-rootport quirk instead. > > > > > > > There is nothing broken in Tegra194 root port as such, rather, this > > > is more of software configuration choice and we are going with > > > legacy interrupts than MSI interrupts (as Tegra194 doesn't support > > > raising PME interrupts through MSI and please note that this doesn't > > > mean root port is broken). > > > > I think the port *is* broken. PCIe r4.0, sec 6.1.6, says > > > > If the Root Port is enabled for edge-triggered interrupt signaling > > using MSI or MSI-X, an interrupt message must be sent every time the > > logical AND of the following conditions transitions from FALSE to > > TRUE: > > > > * The associated vector is unmasked (not applicable if MSI does > > not support PVM). > > > > * The PME Interrupt Enable bit in the Root Control register is set > > to 1b. > > > > * The PME Status bit in the Root Status register is set. > > > > The Tegra194 root port advertises MSI support, so the above should > > apply. > I had a discussion with our hardware engineers and we are of the > opinion that the root port is not really broken w.r.t MSI as spec > doesn't clearly say that if root port advertises MSI support, it > must generate MSI interrupts for PME. All that it says is, if MSI is > enabled, then MSI should be raised for PME events. Here, by > 'enable', we understand that as enabling at hardware level to > generate MSI interrupt which is not the case with Tegra194. In > Tegra194, root port is enabled to generate MSI only for hot-plug > events and legacy interrupts are used for PME, AER. Do you have "lspci -vvxxx" output for the root ports handy? If there's some clue in the standard config space that would tell us that MSI works for some events but not others, we could make the PCI core pay attention it. That would be the best solution because it wouldn't require Tegra-specific code. If this situation requires Tegra-specific code, that becomes an issue if you ever want to use the part in an ACPI system because the ACPI host bridge driver is generic and there isn't a place to put device-specific code. Bjorn
