Re: Fwd: AMD IO_PAGE_FAULT w/NTB on Write ops?

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On 4/24/19 5:04 PM, Eric Pilmore wrote:
> On Tue, Apr 23, 2019 at 4:00 AM Sanjay R Mehta <sanmehta@xxxxxxx> wrote:
>>
>>
>>> AMD-Vi: Event logged [IO_PAGE_FAULT device=23:01.2 domain=0x0000
>>> address=0x00000000fde1c18c flags=0x0070]
>>
>> the address in the above log looks to be physical address of memory window. Am I Right?
>>
>> If yes then, the first parameter of dma_alloc_coherent() to be passed as below,
>>
>> dma_alloc_coherent(&ntb->pdev->dev, ...)instead of dma_alloc_coherent(&ntb->dev, ...).
>>
>> Hope this should solve your problem.
> 
> Hi Sanjay,
> 
> Thanks the for the response.  We are using the correct device for the
> dma_alloc_coherent(). Upon further investigation what we are finding
> is that apparently the AMD IOMMU support can only manage one alias, as
> opposed to Intel IOMMU support which can support multiple. Not clear
> at this time if it's a software limitation in the AMD IOMMU kernel
> support or an imposed limitation of the hardware. Still investigating.

Please define 'alias'?

The IO_PAGE_FAULT error is described on page 142 of the AMD IOMMU spec, 
document #48882. Easily found via a search.

The flags value of 0x0070 translates to PE, RW, PR. The page was 
present, the transaction was a write, and the peripheral didn't have 
permission. That implies that mapping hadn't been done.

Not being sure how that device presents, or what you're doing with IVHD 
info, I can't comment further. I can say that the AMD IOMMU provides for 
a single exclusion range, but as many unity ranges as you wish.

HTH

grh




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