From: Honghui Zhang <honghui.zhang@xxxxxxxxxxxx> scripts/coccinelle/api/resource_size.cocci complain about the following warning: pcie-mediatek.c:720:13-16: WARNING: Suspicious code. resource_size is maybe missing with mem Use resource_size(mem) instead of mem->end - mem->start to eliminate the complain. Since the MMIO window size for both MT2712 and MT7622 are all 0x1000_0000, this change also fix the AHB2PCIe window size smaller than HW MMIO window size issue by change the values of fls(size) from fls(0xfff_ffff) to fls(0x1000_0000). Signed-off-by: Honghui Zhang <honghui.zhang@xxxxxxxxxxxx> --- drivers/pci/controller/pcie-mediatek.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/pci/controller/pcie-mediatek.c b/drivers/pci/controller/pcie-mediatek.c index 55e471c..01126b8 100644 --- a/drivers/pci/controller/pcie-mediatek.c +++ b/drivers/pci/controller/pcie-mediatek.c @@ -654,7 +654,6 @@ static int mtk_pcie_startup_port_v2(struct mtk_pcie_port *port) struct resource *mem = &pcie->mem; const struct mtk_pcie_soc *soc = port->pcie->soc; u32 val; - size_t size; int err; /* MT7622 platforms need to enable LTSSM and ASPM from PCIe subsys */ @@ -706,8 +705,8 @@ static int mtk_pcie_startup_port_v2(struct mtk_pcie_port *port) mtk_pcie_enable_msi(port); /* Set AHB to PCIe translation windows */ - size = mem->end - mem->start; - val = lower_32_bits(mem->start) | AHB2PCIE_SIZE(fls(size)); + val = lower_32_bits(mem->start) + | AHB2PCIE_SIZE(fls(resource_size(mem))); writel(val, port->base + PCIE_AHB_TRANS_BASE0_L); val = upper_32_bits(mem->start); -- 2.6.4
