On Wed, Jan 02, 2019 at 02:03:53PM +0800, honghui.zhang@xxxxxxxxxxxx wrote: > From: Honghui Zhang <honghui.zhang@xxxxxxxxxxxx> > > drivers/pci/pcie-mediatek.c:720:13-16: WARNING: Suspicious code. resource_size is maybe missing with mem > > Generated by: scripts/coccinelle/api/resource_size.cocci > > Signed-off-by: Honghui Zhang <honghui.zhang@xxxxxxxxxxxx> > --- > drivers/pci/controller/pcie-mediatek.c | 4 +--- > 1 file changed, 1 insertion(+), 3 deletions(-) > > diff --git a/drivers/pci/controller/pcie-mediatek.c b/drivers/pci/controller/pcie-mediatek.c > index e307166..0168376 100644 > --- a/drivers/pci/controller/pcie-mediatek.c > +++ b/drivers/pci/controller/pcie-mediatek.c > @@ -654,7 +654,6 @@ static int mtk_pcie_startup_port_v2(struct mtk_pcie_port *port) > struct resource *mem = &pcie->mem; > const struct mtk_pcie_soc *soc = port->pcie->soc; > u32 val; > - size_t size; > int err; > > /* MT7622 platforms need to enable LTSSM and ASPM from PCIe subsys */ > @@ -706,8 +705,7 @@ static int mtk_pcie_startup_port_v2(struct mtk_pcie_port *port) > mtk_pcie_enable_msi(port); > > /* Set AHB to PCIe translation windows */ > - size = mem->end - mem->start; > - val = lower_32_bits(mem->start) | AHB2PCIE_SIZE(fls(size)); > + val = lower_32_bits(mem->start) | AHB2PCIE_SIZE(fls(resource_size(mem))); This is actually a fairly interesting change because it effectively changes this: fls(mem->end - mem->start) to this: fls(mem->end - mem->start + 1) And mem->end is the last valid address, so it changes something like this: fls(0xffff) # == 15 to this: fls(0x10000) # == 16 So while this *looks* like a trivial warning fix, it likely fixes an important bug, and it's worth pointing out what that bug is in the changelog. > writel(val, port->base + PCIE_AHB_TRANS_BASE0_L); > > val = upper_32_bits(mem->start); > -- > 2.6.4 >
