On 2018/12/19 6:47, Bjorn Helgaas wrote:
> On Tue, Dec 18, 2018 at 04:04:46PM +0800, Hanjie Lin wrote:
>> From: Yue Wang <yue.wang@xxxxxxxxxxx>
>>
>> The Amlogic Meson PCIe host controller is based on the Synopsys DesignWare
>> PCI core. This patch adds the driver support for Meson PCIe controller.
>
> I don't have any comments on the code itself; just the trivial things
> below. No need to repost for these unless you're changing something
> else.
>
> I thought it looked very pretty overall, thanks for paying attention
> to that!
>
>> +static int meson_size_to_payload(struct meson_pcie *mp, int size)
>> +{
>> + struct device *dev = mp->pci.dev;
>> +
>> + /*
>> + * dwc supports 2^(val+7) payload size, which val is 0~5 default to 1.
>> + * So if input size is not 2^order alignment or less than 2^7 or bigger
>> + * than 2^12, just set to default size 2^(1+7).
>> + */
>> + if (!is_power_of_2(size) || size < 128 || size > 4096) {
>> + dev_warn(dev, "playload size %d, set to default 256\n", size);
>
> s/playload/payload/
>
>> +static void meson_set_max_payload(struct meson_pcie *mp, int size)
>> +{
>> + u32 val = 0;
>
> Unnecessary initialization.
>
>> + int max_payload_size = meson_size_to_payload(mp, size);
>> +
>> + val = meson_elb_readl(mp, PCIE_DEV_CTRL_DEV_STUS);
>
>> +static int meson_pcie_rd_own_conf(struct pcie_port *pp, int where, int size,
>> + u32 *val)
>> +{
>> + struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
>> + int ret;
>> +
>> + ret = dw_pcie_read(pci->dbi_base + where, size, val);
>> + if (ret != PCIBIOS_SUCCESSFUL)
>> + return ret;
>> +
>> + /*
>> + * There is a bug in the MESON AXG pcie controller whereby software
>> + * cannot programme the PCI_CLASS_DEVICE register, so we must fabricate
>> + * the return value in the config accessors.
>
> s/pcie/PCIe/
> s/programme/program/ (IIUC, "programme" is British and only used as a
> noun, where here you need a verb)
>
>> +static int meson_pcie_link_up(struct dw_pcie *pci)
>> +{
>> + struct meson_pcie *mp = to_meson_pcie(pci);
>> + struct device *dev = pci->dev;
>> + u32 smlh_up = 0;
>> + u32 ltssm_up = 0;
>> + u32 rdlh_up = 0;
>
> Unnecessary initialization of smlh_up, ltssm_up, and rdlh_up.
>
>> + u32 speed_okay = 0;
>> + u32 cnt = 0;
>> + u32 state12, state17;
>> +
>> + do {
>> + state12 = meson_cfg_readl(mp, PCIE_CFG_STATUS12);
>> + state17 = meson_cfg_readl(mp, PCIE_CFG_STATUS17);
>> + smlh_up = IS_SMLH_LINK_UP(state12);
>> + rdlh_up = IS_RDLH_LINK_UP(state12);
>> + ltssm_up = IS_LTSSM_UP(state12);
>
>> + dev_err(dev, "Error: Wait linkup timeout.\n");
>
> Message doesn't match others from driver (capitalization and trailing
> period).
>
>> + dev_err(dev, "failed to get msi irq\n");
>
> s/msi irq/MSI IRQ/
>
>> + ret = meson_add_pcie_port(mp, pdev);
>> + if (ret < 0) {
>> + dev_err(dev, "Add PCIE port failed, %d\n", ret);
>
> s/PCIE/PCIe/
>
> All the messages in this function are capitalized differently than
> other messages in the driver.
>
> Bjorn
>
> .
>
hi Bjorn:
Thanks for the all suggestions and corrections.
There were too many code details unnecessary initialization, typing errors
and coding style etc. I will pay more attention to these rules and code-details
in the future patches also my daily work.
thanks again
hanjie.
