On Mon, 10 Dec 2018 12:39:36 -0700 Logan Gunthorpe <logang@xxxxxxxxxxxx> wrote: > On 2018-12-10 12:36 p.m., Eric Wehage wrote: > > There are 5 TLP types described in each of the three P2P Routes. I'm > > not sure that anyone would care about Message Bandwidth, so I > > could simply add 3 bits to each Route register indicating whether the > > P2P route bandwidth supports the same or more bandwidth than if it > > targeted DRAM. > > > > The three RO/HWInit bits for each route register would be: > > - P2P Memory Read Bandwidth is equal to or greater than to Main > > Memory > > - P2P Memory Write Bandwidth is equal to or greater than to Main > > Memory > > - P2P Memory AtomicOp Bandwidth is equal to or greater than to Main > > Memory > > Yeah! That sounds great. Thanks. > > Logan Updated ECR and presentation at: Presentation: https://drive.google.com/open?id=1fgwz8w32K2ju9aIySP8RXwQwUAcT9icF ECR: https://drive.google.com/open?id=1cHn4OHgTJpa0KkiVab_CyK1NMjPap3MM A few small editorial bits and pieces. The main change is making the Memory Read, Memory Write and Atomic capabilities in addition to indicating they support peer to peer at all, can now give an indication of supporting 'same bandwidth as to system memory'. Note that from a PCI viewpoint system memory really means anything beyond the host so caches etc are all rolled into that term. Thanks, Eric and Jonathan
