Hi, Keith, Following is the discussion adding the first quirk in this file, https://lore.kernel.org/lkml/8770820b-85a0-172b-7230-3a44524e6c9f@xxxxxxxxxxxxx/T/#u >From the discussion, I guess putting the code here is to make it just the quirk for pcie hotplug. Thanks. Shunyong. On 2018/11/20 0:19, Keith Busch wrote: > On Wed, Nov 07, 2018 at 03:25:05PM +0800, Shunyong Yang wrote: >> The HXT SD4800 PCI controller does not set the Command Completed >> bit unless writes to the Slot Command register change "Control" >> bits. >> >> This patch adds SD4800 to the quirk. >> >> Cc: Joey Zheng <yu.zheng@xxxxxxxxxxxxxxxx> >> Signed-off-by: Shunyong Yang <shunyong.yang@xxxxxxxxxxxxxxxx> >> >> diff --git a/drivers/pci/hotplug/pciehp_hpc.c b/drivers/pci/hotplug/pciehp_hpc.c >> index 7dd443aea5a5..91db67963aea 100644 >> --- a/drivers/pci/hotplug/pciehp_hpc.c >> +++ b/drivers/pci/hotplug/pciehp_hpc.c >> @@ -920,3 +920,5 @@ static void quirk_cmd_compl(struct pci_dev *pdev) >> PCI_CLASS_BRIDGE_PCI, 8, quirk_cmd_compl); >> DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_VENDOR_ID_QCOM, 0x0401, >> PCI_CLASS_BRIDGE_PCI, 8, quirk_cmd_compl); >> +DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_VENDOR_ID_HXT, 0x0401, >> + PCI_CLASS_BRIDGE_PCI, 8, quirk_cmd_compl); > > I guess you're just appending to where this quirk is already defined, > but why are the quirks even in the core driver instead of pci/quirks.c? >
