On Thu, Oct 11, 2018 at 05:15:03PM +0100, Alan Douglas wrote: > These patches were previously in the patch series: > "Add MSI-X support for cadence EP driver" > > They add fixes for MSI issues discovered during testing of MSI-X > - Use AXI region 0 for interrupt signalling > - Write MSI with 32bit value rather than 16bit > - Check for masking before sending MSI > - Check link is up before sending IRQ > > Changes since v3: > - Rebase on Lorenzo's pci/cadence branch > > Changes since v2: > - None > > Changes since v1: > - Rebased on 4.18-rc1 > - Update commit log to mark first 4 patches as fixes > - Correct formatting issues pointed out by checkpatch --strict > > > Alan Douglas (4): > PCI: cadence: Use AXI region 0 to signal interrupts from EP > PCI: cadence: Write MSI data with 32bits > PCI: cadence: Check whether MSI is masked before sending it > PCI: cadence: Check link is up before sending IRQ from EP > > drivers/pci/controller/pcie-cadence-ep.c | 24 ++++++++++++++++++------ > 1 file changed, 18 insertions(+), 6 deletions(-) Applied to pci/cadence for v4.20, thanks. Lorenzo
