Re: bug in pci_try_reset_bus

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On 8/27/2018 4:18 PM, Sinan Kaya wrote:
On 8/27/2018 3:52 PM, Dennis Dalessandro wrote:

can you please confirm?

Ah yes, silly me. pci_bus_reset() returns 0 and it does go on but doesn't make it to the trylock, it gets hung calling pci_bus_save_and_disable().


OK. That makes sense now. pci_bus_save_and_disable() is also trying to
obtain a device lock via pci_dev_lock().

Since you are calling this from probe time, you are getting dead lock
because device is locked.

Is it possible to defer this secondary bus reset operation to post probe?

I don't think so. We need to do a gen3 bump at probe. I don't know that there is any other hardware that does is so probably why it hasn't been noticed.

Possible solutions are:
1. introduce a locked reset API > 2. skip lock during probe
3. bring back raw reset API even though it is undesirable.

I think the first option is the cleanest. I can put together a patch and post it soon.

Other opinions?

BTW, please file a bugzilla and capture your email details there so that we
can have record of what we are doing?

I can certainly do that.

Thanks for your help on this!

-Denny



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