Re: [PATCH 0/5] Add MSI-X support for cadence EP driver

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Hi Alan,

On Mon, Jul 30, 2018 at 06:21:00PM +0100, Alan Douglas wrote:
> Patch series made against Bjorn Helgaas's pci next branch.

Always rebase patches on a fixed -rc (ie Bjorn and I are using
v4.18-rc1) and mention the dependency rather than rebasing the
series on pci-next please.

> It relies on Gustavo Pimentel's patch series adding MSI-X
> support in the PCIe EP driver framework, and implements
> MSI-X support for the cadence endpoint driver.
>  - Use AXI region 0 for interrupt signalling
>  - Write MSI and MSI-X with 32bit value rather than 16bit
>  - Check for masking before sending MSI or MSI-X
>  - Check link is up before sending IRQ

These first four are fixes or changes required before enabling
the last patch in the series ?

Reworded: does the current driver work without the first 4
patches applied ?

If they are fixes please mark them as such in the commit log.

Thanks,
Lorenzo

>  - Use BAR5 for MSI-X vectors
> 
> Alan Douglas (5):
>   PCI: cadence: Use AXI region 0 to signal interrupts from EP
>   PCI: cadence: Write MSI data with 32bits
>   PCI: cadence: Check whether MSI is masked before sending it
>   PCI: cadence: Check link is up before sending IRQ from EP
>   PCI: cadence: Add MSI-X capability to EP driver
> 
>  drivers/pci/controller/pcie-cadence-ep.c |  129 ++++++++++++++++++++++++++++--
>  drivers/pci/controller/pcie-cadence.h    |    1 +
>  2 files changed, 124 insertions(+), 6 deletions(-)
> 



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