> Subject: Re: [PATCH 3/3] PCI/portdrv: Add support for sharing xilinx > controller irq with AER > > On Wed, Aug 01, 2018 at 11:05:09AM -0700, Sinan Kaya wrote: > > On 8/1/2018 9:44 AM, Bharat Kumar Gogada wrote: > > > Xilinx ZynqMP PS PCIe does not report AER interrupts using Advanced > > > Error Interrupt Message Number. The controller has dedicated > > > interrupt line for reporting PCIe errors along with AER. > > > > > > Using dedicated controller irq number for AER which is shared with > > > misc interrupt handler in pcie-xilinx-nwl. This irq number is set > > > using PCI quirk. > > > > > > Signed-off-by: Bharat Kumar Gogada<bharat.kumar.gogada@xxxxxxxxxx> > > > --- > > > drivers/pci/pcie/portdrv_core.c | 4 ++++ > > > 1 files changed, 4 insertions(+), 0 deletions(-) > > > > > > diff --git a/drivers/pci/pcie/portdrv_core.c > > > b/drivers/pci/pcie/portdrv_core.c index e0261ad..fa9150e 100644 > > > --- a/drivers/pci/pcie/portdrv_core.c > > > +++ b/drivers/pci/pcie/portdrv_core.c > > > @@ -264,6 +264,10 @@ static int pcie_device_init(struct pci_dev *pdev, > int service, int irq) > > > int retval; > > > struct pcie_device *pcie; > > > struct device *device; > > > +#if defined(CONFIG_ARCH_ZYNQMP) && > defined(CONFIG_PCIE_XILINX_NWL) > > > + if (service == PCIE_PORT_SERVICE_AER && pdev->sysdata) > > > + irq = *(int *)pdev->sysdata; > > > +#endif > > > > I remember seeing a similar patch before. > > Are you thinking of [1]? Thanks for reviewing. Yes this case is also similar to [1]. I'm not aware of this [1]. I will withdraw this current patches. Will work on a different model based on your suggestions. Regards, Bharat
