On 8/6/2018 10:55 AM, poza@xxxxxxxxxxxxxx wrote:
Either AER or DPC would get triggered, not both.
in that case, if AER is disabled, then this code will return false
thinking HP needs to handle it.
but it might be that DPC would be triggering as well.
but I dont see DPC check anywhere, rather we are relying on PCI_EXP_DEVSTA
and following condition:
if (!pdev->aer_cap)
return false;
so here we dont check anything with respect to DPC capability (although
there is no such thing as dpc_cap)
(except If I missed something)
That's true. We either need to go poll every single source (AER/DPC) for
an error or rely on the DEVSTA. For ease of implementation, I suggest
DEVSTA. Something like this:
+bool pcie_fatal_error_pending(struct pci_dev *pdev, u32 usrmask)
+{
+ u16 err_status = 0;
+ u32 status, mask, severity;
+ int rc;
+
+ if (!pci_is_pcie(pdev))
+ return false;
+
+ rc = pcie_capability_read_word(pdev, PCI_EXP_DEVSTA, &err_status);
+ if (rc)
+ return false;
+
+ if (!(err_status & PCI_EXP_DEVSTA_FED))
+ return false;
+ return true;
+}
