> -----Original Message----- > From: Trent Piepho [mailto:tpiepho@xxxxxxxxxx] > Sent: Thursday, August 2, 2018 1:34 AM > To: l.stach@xxxxxxxxxxxxxx; linux-arm-kernel@xxxxxxxxxxxxxxxxxxx; > linux-pci@xxxxxxxxxxxxxxx > Cc: Richard Zhu <hongxing.zhu@xxxxxxx>; shawnguo@xxxxxxxxxx; > kernel@xxxxxxxxxxxxxx; Fabio Estevam <fabio.estevam@xxxxxxx> > Subject: Re: [PATCH 1/2] ARM: dts: imx7d: Add node for PCIe PHY > > On Wed, 2018-08-01 at 12:39 +0200, Lucas Stach wrote: > > > > > +This is the PHY associated with the IMX7d PCIe controller. It's > > > used by the > > > +PCI-e controller via the fsl,pcie-phy phandle. > > > + > > > +Required properties: > > > +- compatible: > > > + - "fsl,imx-pcie-phy" > > > > This is too generic. Please change it to "fsl,imx7-pcie-phy". > > Can anyone from NXP tell us if an external PCIe PHY block is present in other > IMX designs? I suspect that this is generic, but no design other than imx7d > has had any reason to use this PHY register space yet. > Hi Trent: There is a different PCIe PHY block in imx7d PCIe refer to the imx6. So, the standalone memory region is used to map the imx7d PCIe PHY registers. Instead of the standalone PHY node, how about to include the PHY registers memory region into PCIe node? For example: pcie: pcie@0x33800000 { compatible = "fsl,imx7d-pcie", "snps,dw-pcie"; reg = <0x33800000 0x4000>, <0x306d0000 0x10000>, <0x4ff00000 0x80000>; reg-names = "dbi", "phy", "config"; Richard Zhu Best Regards! > If this is specific to this SoC, then maybe it shoudl be fsl,imx7d- pcie-phy, since > the iMX7s has no pcie.
