On Fri, Jun 29, 2018 at 11:16:19AM +0200, Thomas Petazzoni wrote: > From: Zachary Zhang <zhangzg@xxxxxxxxxxx> > > The PCIE I/O and MEM resource allocation mechanism is that root bus > goes through the following steps: > > 1. Check PCI bridges' range and computes I/O and Mem base/limits. > > 2. Sort all subordinate devices I/O and MEM resource requirements and > allocate the resources and writes/updates subordinate devices' > requirements to PCI bridges I/O and Mem MEM/limits registers. > > Currently, PCI Aardvark driver only handles the second step and lacks > the first step, so there is an I/O and MEM resource allocation failure > when using a PCI switch. This commit fixes that by sizing bridges > before doing the resource allocation. > > Signed-off-by: Zachary Zhang <zhangzg@xxxxxxxxxxx> > [Thomas: edit commit log.] > Signed-off-by: Thomas Petazzoni <thomas.petazzoni@xxxxxxxxxxx> > --- > drivers/pci/controller/pci-aardvark.c | 1 + > 1 file changed, 1 insertion(+) Hi Thomas, I am queueing these two patches but this one seems a serious bug, I reckon we should send it to stable kernels (and would be grateful if you provide me with a Fixes tag and a kernel log to add to the commit log). Thanks, Lorenzo > > diff --git a/drivers/pci/controller/pci-aardvark.c b/drivers/pci/controller/pci-aardvark.c > index 486c41721c89..8e92231214e3 100644 > --- a/drivers/pci/controller/pci-aardvark.c > +++ b/drivers/pci/controller/pci-aardvark.c > @@ -1065,6 +1065,7 @@ static int advk_pcie_probe(struct platform_device *pdev) > > bus = bridge->bus; > > + pci_bus_size_bridges(bus); > pci_bus_assign_resources(bus); > > list_for_each_entry(child, &bus->children, node) > -- > 2.14.4 >
