Re: RFC: Counters for PCI Express AERs

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On 05/17/2018 05:52 PM, Rajat Jain wrote:
> [Fixing the new email address for Jes Sorensen now]
> 
> On Thu, May 17, 2018 at 2:48 PM, Rajat Jain <rajatja@xxxxxxxxxx> wrote:
>> [+Jes Sorensen]
>>
>> On Thu, May 17, 2018 at 2:25 PM,  <okaya@xxxxxxxxxxxxxx> wrote:
>>> On 2018-05-17 17:05, Rajat Jain wrote:
>>>>
>>>> Hello,
>>>>
>>>> I have been thinking about adding counters for different kinds of AERs
>>>> and expose them via sysfs. IMHO this would help by giving some sense
>>>> of "link quality" for PCIe links (a lot of correctable AERs may
>>>> indicate system is workable, but may indicate some signal integrity
>>>> issues etc). Currently, on a correctable AER, we do log them, but
>>>> having them in sysfs would allow userspace tools to possibly
>>>> (periodically) poll them and raise an appropriate warning in case of
>>>> too many errors. I know that for my purposes, getting some idea of PCI
>>>> link quality or a way to quantize it, would help.
>>>>
>>>> Do you think such counters make sense or would be helpful generically?
>>>> Also, please let me know if something like this already exists?
>>>
>>>
>>> This question came from FB folks last year. They were told to use the perf
>>> events for counting.
>>
>> Thanks for the info. I think you are referring to this:
>>
>> Jes: did anything come out of the proposal? I'm wondering if you have
>> any patch that in work-in-progress that I could use may be as a
>> starting point?

Kyle McMartin was working on this, I don't know the current status.

Jes





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