Re: [PATCH v4 04/10] bindings: PCI: designware: Add support for the EP in Designware driver

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On Mon, Apr 16, 2018 at 03:37:52PM +0100, Gustavo Pimentel wrote:
> Add device tree binding documentation for the Endpoint in PCIe Designware
> driver.
> 
> Signed-off-by: Gustavo Pimentel <gustavo.pimentel@xxxxxxxxxxxx>
> ---
> Change v1->v2:
>  - Add a missing log description.
>  - Add "snps,dw-pcie" compatible string following Kishon's suggestion.
> Change v2->v3:
> - Reverted pcie_ep name to pcie.
> Changes v3->v4:
> - Reverted "snps,dw-pcie-rc" compatible string requested by Rob Herring.
> 
>  Documentation/devicetree/bindings/pci/designware-pcie.txt | 13 +++++++++++++
>  1 file changed, 13 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/pci/designware-pcie.txt b/Documentation/devicetree/bindings/pci/designware-pcie.txt
> index 7f9804d..980fc9a 100644
> --- a/Documentation/devicetree/bindings/pci/designware-pcie.txt
> +++ b/Documentation/devicetree/bindings/pci/designware-pcie.txt
> @@ -3,6 +3,7 @@
>  Required properties:
>  - compatible:
>  	"snps,dw-pcie" for RC mode;
> +	"snps,dw-pcie-ep" for EP mode;
>  - reg: Should contain the configuration address space.
>  - reg-names: Must be "config" for the PCIe configuration space.
>      (The old way of getting the configuration address space from "ranges"
> @@ -56,3 +57,15 @@ Example configuration:
>  		#interrupt-cells = <1>;
>  		num-lanes = <1>;
>  	};
> +or
> +	pcie: pcie@dfc00000 {
> +		compatible = "snps,dw-pcie-ep";
> +		reg = <0xdfc00000 0x0001000>, /* IP registers 1 */
> +		      <0xdfc01000 0x0001000>, /* IP registers 2 */
> +		      <0xd0000000 0x2000000>; /* Configuration space */
> +		reg-names = "dbi", "dbi2", "addr_space";
> +		device_type = "pci";

This should not be present for endpoints.

With that dropped,

Reviewed-by: Rob Herring <robh@xxxxxxxxxx>


> +		num-ib-windows = <6>;
> +		num-ob-windows = <2>;
> +		num-lanes = <1>;
> +	};
> -- 
> 2.7.4
> 
> 



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