Implement a multiplexed IRQ domain hierarchy API in the pcie-designware host bridge driver that funnels all MSI IRQs into a single parent interrupt, moving away from the obsolete struct msi_controller based API. Remove all existing dwc based host bridges MSI IRQs handlers, in that the hierarchical API now handles MSI IRQs through the hierarchical/chained MSI domain implementation. The Synopsys PCIe Root Complex supports up to MSI 256 IRQs distributed over 8 controller registers, therefore the maximum number of MSI IRQs can be changed to 256. The number of controllers can be calculated based on the number of vectors used by the specific SoC driver. Adds Synopsys Root Complex driver support for MSI-X feature. The patch set was made against the Bjorn's master branch (v4.16-rc1). Gustavo Pimentel (4): PCI: dwc: Move MSI IRQs allocation to IRQ domains hierarchical API PCI: dwc: Remove old MSI IRQs API PCI: dwc: Expand maximum number of MSI IRQs from 32 to 256 PCI: dwc: Code cleanup drivers/pci/dwc/pci-exynos.c | 18 -- drivers/pci/dwc/pci-imx6.c | 18 -- drivers/pci/dwc/pci-keystone-dw.c | 91 +------ drivers/pci/dwc/pci-keystone.c | 1 + drivers/pci/dwc/pci-keystone.h | 4 +- drivers/pci/dwc/pci-layerscape.c | 3 +- drivers/pci/dwc/pcie-artpec6.c | 18 -- drivers/pci/dwc/pcie-designware-host.c | 446 +++++++++++++++++++-------------- drivers/pci/dwc/pcie-designware-plat.c | 22 +- drivers/pci/dwc/pcie-designware.h | 31 ++- drivers/pci/dwc/pcie-histb.c | 15 -- drivers/pci/dwc/pcie-qcom.c | 16 -- 12 files changed, 292 insertions(+), 391 deletions(-) -- 2.7.4
