Hi Lukas,
On 02/21/2018 03:24 PM, Lukas Wunner wrote:
On Wed, Feb 21, 2018 at 02:58:13PM +0530, George Cherian wrote:
I will explain the setup used
To the Cavium ThunderX RC the following PLX device is connected.
PLX Technology, Inc. PEX 8747 48-Lane, 5-Port PCI Express Gen 3 (8.0 GT/s)
Switch
There is no device connected downstream to the PLX switch.
AFAIU the pcie_port driver probes PLX and enters autosuspend after 100ms
since pci_bridge_d3_possible() returns true.
And later pci_sysfs_init() ends up doing a config access of PLX which fails
with a "synchronous external abort"
Then you're missing a pci_config_pm_runtime_get() in pci_sysfs_init() or
further down in the call stack, rather than a quirk which just papers
over the issue.
I have found another configuration where this fails.
Following is the configuration
1) Connected a PCIe Intel i40 card under the root port.
2) unbind the i40 driver and bind with vfio-pci driver.
3) Run lspci in a loop. "lspci -s xx:xx.xx -vvv"
I get the same synchronous external abort.
In this case the vfio-pci driver probe it moves the device (i40) to
D3hot provided disable_idle_d3 is not set. lspci tries to do
the config_access which fails with synchronous external abort when
the root port transitions to D3hot.
Thanks,
Lukas
Regards,
-George
