Hi Lucas and Richard,
On Mon, Feb 5, 2018 at 5:14 PM, Lorenzo Pieralisi
<lorenzo.pieralisi@xxxxxxx> wrote:
> On Mon, Jan 15, 2018 at 10:36:08AM +0100, Koen Vandeputte wrote:
>> The subordinate value indicates the highest bus number which can be
>> reached downstream though a certain device.
>>
>> Commit a20c7f36bd3d ("PCI: Do not allocate more buses than available in
>> parent")
>> ensures that downstream devices cannot assign busnumbers higher than the
>> upstream device subordinate number, which was indeed illogical.
>>
>> By default, dw_pcie_setup_rc() inits the Root Complex subordinate to a
>> value of 0x01.
>>
>> Due to this combined with above commit, enumeration stops digging deeper
>> downstream as soon as bus num 0x01 has been assigned, which is always
>> the case for a bridge device.
>>
>> This results in all devices behind a bridge bus to remain undetected, as
>> these would be connected to bus 0x02 or higher.
>>
>> Fix this by initializing the RC to a subordinate value of 0xff, which is
>> not altering hardware behaviour in any way, but informs probing
>> function pci_scan_bridge() later on which reads this value back from
>> register.
>>
>> Following nasty errors during boot are also fixed by this:
>>
>> [ 0.459145] pci_bus 0000:02: busn_res: can not insert [bus 02-ff]
>> under [bus 01] (conflicts with (null) [bus 01])
>> ...
>> [ 0.464515] pci_bus 0000:03: [bus 03] partially hidden behind bridge
>> 0000:01 [bus 01]
>> ...
>> [ 0.464892] pci_bus 0000:04: [bus 04] partially hidden behind bridge
>> 0000:01 [bus 01]
>> ...
>> [ 0.466488] pci_bus 0000:05: [bus 05] partially hidden behind bridge
>> 0000:01 [bus 01]
>> [ 0.466506] pci_bus 0000:02: busn_res: [bus 02-ff] end is updated to
>> 05
>> [ 0.466517] pci_bus 0000:02: busn_res: can not insert [bus 02-05]
>> under [bus 01] (conflicts with (null) [bus 01])
>> [ 0.466534] pci_bus 0000:02: [bus 02-05] partially hidden behind
>> bridge 0000:01 [bus 01]
>>
>> Fixes: a20c7f36bd3d ("PCI: Do not allocate more buses than available in
>> parent")
>> Signed-off-by: Koen Vandeputte <koen.vandeputte@xxxxxxxxxxxx>
>> Tested-by: Niklas Cassel <niklas.cassel@xxxxxxxx>
>> Cc: Binghui Wang <wangbinghui@xxxxxxxxxxxxx>
>> Cc: Bjorn Helgaas <bhelgaas@xxxxxxxxxx>
>> Cc: Jesper Nilsson <jesper.nilsson@xxxxxxxx>
>> Cc: Jianguo Sun <sunjianguo1@xxxxxxxxxx>
>> Cc: Jingoo Han <jingoohan1@xxxxxxxxx>
>> Cc: Kishon Vijay Abraham I <kishon@xxxxxx>
>> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@xxxxxxx>
>> Cc: Lucas Stach <l.stach@xxxxxxxxxxxxxx>
>> Cc: Mika Westerberg <mika.westerberg@xxxxxxxxxxxxxxx>
>> Cc: Minghuan Lian <minghuan.Lian@xxxxxxxxxxxxx>
>> Cc: Mingkai Hu <mingkai.hu@xxxxxxxxxxxxx>
>> Cc: Murali Karicheri <m-karicheri2@xxxxxx>
>> Cc: Pratyush Anand <pratyush.anand@xxxxxxxxx>
>> Cc: Richard Zhu <hongxing.zhu@xxxxxxx>
>> Cc: Roy Zang <tie-fei.zang@xxxxxxxxxxxxx>
>> Cc: Shawn Guo <shawn.guo@xxxxxxxxxx>
>> Cc: Stanimir Varbanov <svarbanov@xxxxxxxxxx>
>> Cc: Thomas Petazzoni <thomas.petazzoni@xxxxxxxxxxxxxxxxxx>
>> Cc: Xiaowei Song <songxiaowei@xxxxxxxxxxxxx>
>> Cc: Zhou Wang <wangzhou1@xxxxxxxxxxxxx>
>> ---
>> drivers/pci/dwc/pcie-designware-host.c | 2 +-
>> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> I would appreciate some testing from dwc host maintainers so that
> we can merge this patch, it is a bug fix that should be merged as
> soon as possible, please help Koen test it and provide feedback
> on the list.
Is it possible for you to test this patch?
Thanks
