Re: One Question About PCIe BUS Config Type with pcie_bus_safe or pcie_bus_perf On NVMe Device

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On 2/1/2018 10:14 AM, Sinan Kaya wrote:
> I think from above examples:
> 1. perf mode is moving devices to 256 MPS as it can.
> 2. safe mode is setting to 128 MPS
> 3. perf mode set MRRS=MPS is a CORRECT call for device with MPSC lower than its parents.

Thinking more about this...

The only way for a transaction of size that's greater than MRRS can happen if there
is a device specific driver attached that sends commands to the device and device issues
a large sized memory read transaction.

Let's say that we find the slow device in tree.

If no driver is attached to a slow device in the tree and assume it is safe and do not
reduce MRRS?

> 4. perf mode set MRRS=MPS is not necessary for a device with SAME MPSC as its parents?
> 5. it is an interested point to me that slot/switch/root MRRS are always set to 128B, I have not found out why.


-- 
Sinan Kaya
Qualcomm Datacenter Technologies, Inc. as an affiliate of Qualcomm Technologies, Inc.
Qualcomm Technologies, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project.



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