tree: https://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci.git next head: f4a9034a443cabb57ea032b36822c52f6ac0cfa0 commit: 26b259ab4fe89cdf0f1f7df98dcca08590f621e9 [16/22] Merge remote-tracking branch 'lorenzo/pci/dwc' into next config: arm-allmodconfig (attached as .config) compiler: arm-linux-gnueabi-gcc (Debian 7.2.0-11) 7.2.0 reproduce: wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross git checkout 26b259ab4fe89cdf0f1f7df98dcca08590f621e9 # save the attached .config to linux build tree make.cross ARCH=arm All errors (new ones prefixed by >>): drivers/pci//dwc/pcie-designware-ep.c: In function 'dw_pcie_ep_raise_msi_irq': >> drivers/pci//dwc/pcie-designware-ep.c:312:8: error: too few arguments to function 'dw_pcie_ep_map_addr' ret = dw_pcie_ep_map_addr(epc, ep->msi_mem_phys, msg_addr, ^~~~~~~~~~~~~~~~~~~ drivers/pci//dwc/pcie-designware-ep.c:190:12: note: declared here static int dw_pcie_ep_map_addr(struct pci_epc *epc, u8 func_no, ^~~~~~~~~~~~~~~~~~~ >> drivers/pci//dwc/pcie-designware-ep.c:319:2: error: too few arguments to function 'dw_pcie_ep_unmap_addr' dw_pcie_ep_unmap_addr(epc, ep->msi_mem_phys); ^~~~~~~~~~~~~~~~~~~~~ drivers/pci//dwc/pcie-designware-ep.c:174:13: note: declared here static void dw_pcie_ep_unmap_addr(struct pci_epc *epc, u8 func_no, ^~~~~~~~~~~~~~~~~~~~~ vim +/dw_pcie_ep_map_addr +312 drivers/pci//dwc/pcie-designware-ep.c f8aed6ec Kishon Vijay Abraham I 2017-03-27 288 6f6d7873 Niklas Cassel 2017-12-20 289 int dw_pcie_ep_raise_msi_irq(struct dw_pcie_ep *ep, 6f6d7873 Niklas Cassel 2017-12-20 290 u8 interrupt_num) 6f6d7873 Niklas Cassel 2017-12-20 291 { 6f6d7873 Niklas Cassel 2017-12-20 292 struct dw_pcie *pci = to_dw_pcie_from_ep(ep); 6f6d7873 Niklas Cassel 2017-12-20 293 struct pci_epc *epc = ep->epc; 6f6d7873 Niklas Cassel 2017-12-20 294 u16 msg_ctrl, msg_data; 6f6d7873 Niklas Cassel 2017-12-20 295 u32 msg_addr_lower, msg_addr_upper; 6f6d7873 Niklas Cassel 2017-12-20 296 u64 msg_addr; 6f6d7873 Niklas Cassel 2017-12-20 297 bool has_upper; 6f6d7873 Niklas Cassel 2017-12-20 298 int ret; 6f6d7873 Niklas Cassel 2017-12-20 299 6f6d7873 Niklas Cassel 2017-12-20 300 /* Raise MSI per the PCI Local Bus Specification Revision 3.0, 6.8.1. */ 6f6d7873 Niklas Cassel 2017-12-20 301 msg_ctrl = dw_pcie_readw_dbi(pci, MSI_MESSAGE_CONTROL); 6f6d7873 Niklas Cassel 2017-12-20 302 has_upper = !!(msg_ctrl & PCI_MSI_FLAGS_64BIT); 6f6d7873 Niklas Cassel 2017-12-20 303 msg_addr_lower = dw_pcie_readl_dbi(pci, MSI_MESSAGE_ADDR_L32); 6f6d7873 Niklas Cassel 2017-12-20 304 if (has_upper) { 6f6d7873 Niklas Cassel 2017-12-20 305 msg_addr_upper = dw_pcie_readl_dbi(pci, MSI_MESSAGE_ADDR_U32); 6f6d7873 Niklas Cassel 2017-12-20 306 msg_data = dw_pcie_readw_dbi(pci, MSI_MESSAGE_DATA_64); 6f6d7873 Niklas Cassel 2017-12-20 307 } else { 6f6d7873 Niklas Cassel 2017-12-20 308 msg_addr_upper = 0; 6f6d7873 Niklas Cassel 2017-12-20 309 msg_data = dw_pcie_readw_dbi(pci, MSI_MESSAGE_DATA_32); 6f6d7873 Niklas Cassel 2017-12-20 310 } 6f6d7873 Niklas Cassel 2017-12-20 311 msg_addr = ((u64) msg_addr_upper) << 32 | msg_addr_lower; 6f6d7873 Niklas Cassel 2017-12-20 @312 ret = dw_pcie_ep_map_addr(epc, ep->msi_mem_phys, msg_addr, 6f6d7873 Niklas Cassel 2017-12-20 313 epc->mem->page_size); 6f6d7873 Niklas Cassel 2017-12-20 314 if (ret) 6f6d7873 Niklas Cassel 2017-12-20 315 return ret; 6f6d7873 Niklas Cassel 2017-12-20 316 6f6d7873 Niklas Cassel 2017-12-20 317 writel(msg_data | (interrupt_num - 1), ep->msi_mem); 6f6d7873 Niklas Cassel 2017-12-20 318 6f6d7873 Niklas Cassel 2017-12-20 @319 dw_pcie_ep_unmap_addr(epc, ep->msi_mem_phys); 6f6d7873 Niklas Cassel 2017-12-20 320 6f6d7873 Niklas Cassel 2017-12-20 321 return 0; 6f6d7873 Niklas Cassel 2017-12-20 322 } 6f6d7873 Niklas Cassel 2017-12-20 323 :::::: The code at line 312 was first introduced by commit :::::: 6f6d7873711c5721308386018a8404bc9a7ecd1d PCI: designware-ep: Add generic function for raising MSI irq :::::: TO: Niklas Cassel <niklas.cassel@xxxxxxxx> :::::: CC: Lorenzo Pieralisi <lorenzo.pieralisi@xxxxxxx> --- 0-DAY kernel test infrastructure Open Source Technology Center https://lists.01.org/pipermail/kbuild-all Intel Corporation
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