On Wed, Dec 20, 2017 at 05:03:07PM +0000, Lorenzo Pieralisi wrote:
[...]
> > +static int mobiveil_pcie_init_irq_domain(struct mobiveil_pcie *pcie)
> > +{
> > + struct device *dev = &pcie->pdev->dev;
> > + struct device_node *node = dev->of_node;
> > + int ret;
>
> ret is unused
>
> > + /* setup INTx */
> > + pcie->intx_domain = irq_domain_add_linear(node,
> > + PCI_NUM_INTX + 1, &intx_domain_ops, pcie);
>
> You should use PCI_NUM_INTX and add pci_irqd_intx_xlate() as the
> domain ops .xlate.
Actually that's not quite correct - so scrap this. The point here is,
the PCI host controller interrupt domain has to have 4 hwirqs (this
is a pseudo interrupt controller - a multiplexer) and it
is through DT interrupt-map that INTx pins (1-4) can be mapped to the
"PCI interrupt controller hwirq inputs" that we consider numbered
from 0 to 3.
It is not that clean-cut but IMO it is the DT interrupt mapping that
should carry out the translation.
See for instance:
arch/arm64/boot/dts/marvell/armada-37xx.dtsi
This requires DT/irqchip maintainers acknowledgement before proceeding.
Lorenzo
