> BTW, can someone point out to me what precise provision in the PCI > spec says that 8/16/32 bit config space writes must be provided? For PCIe: 2.2.5. First/Last DW Byte Enables Rules Byte Enables are included with Memory, I/O, and Configuration Requests. This section defines the corresponding rules. Byte Enables, when present in the Request header, are located in byte 7 of the header (see Figure 2-9). David
