Re: [PATCH 1/2 v4] PCI: v3: Update the device tree bindings

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On Tue, Sep 26, 2017 at 9:16 PM, Bjorn Helgaas <helgaas@xxxxxxxxxx> wrote:
> On Fri, Sep 08, 2017 at 02:45:02PM +0200, Linus Walleij wrote:
>> The bindings for the V3 Semiconductor PCI bridge are a tad bit outdated
>> and predates the more formal format we have adopted for the bindings.
>>
>> Update them a bit so it is easier to read, and add the Integrator AP-
>> specific compatible so we can detect that we are running on that specific
>> platform.
>>
>> Add a second register bank for the configuration memory area. The
>> device tree specs does specify a memory range for configuration
>> space but it is not applicable to custom accessors like this. Instead
>> follow the pattern from the Versatile PCI adapter and simply add
>> a second register bank for this memory.
>>
>> Cc: devicetree@xxxxxxxxxxxxxxx
>> Cc: Marc Gonzalez <marc_gonzalez@xxxxxxxxxxxxxxxx>
>> Acked-by: Rob Herring <robh@xxxxxxxxxx>
>> Signed-off-by: Linus Walleij <linus.walleij@xxxxxxxxxx>
>
> Applied both to pci/host-v3-semi for v4.15, thanks!

Oh it fails to build right now (as the zeroday builder noticed)
since it is using Marc Gonzalez new helper for DMA ranges
parsing.

If Marc's patches are getting applied they will solve the issue
so I wouldn't care in that case.

Yours,
Linus Walleij



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