From: Hou Zhiqiang <Zhiqiang.Hou@xxxxxxx>
Reordered and reformed the version 2 patch set:
The first 5 patches are used to refactor the ls-pcie host init function
and make it robust. And make ls1021a pcie reuse the ls-pcie common host
init function. Disable the bootloader configured outbound windows to avoid
conflict to outbound windows configured by dw_pcie_setup_rc().
The rest 4 patches are aim to fix the designware Class code and interrupt
Pin code fixup doesn't work issue, because they are DBI read-only registers,
so must enable the write permission before updating this register. And removed
the obsolete fixups from layerscape, qcom and artpec6 pcie drivers.
Hou Zhiqiang (9):
PCI: layerscape: Add dw_pcie_setup_rc to ls-pcie common host init
PCI: layerscape: move STRFMR1 access out from the DBI write-enable
bracket
PCI: layerscape: add class code and multifunction fixups for ls1021a
PCI: layerscape: refactor the host_init function
PCI: layerscape: Disable the outbound windows configured by bootloader
PCI: designware: add accessors for write permission of DBI read-only
registers
PCI: layerscape: use accessors to enable/disable DBI RO registers'
write permission
PCI: designware: enable write permission before updating DBI RO
registers
PCI: dwc: remove the obsolete fixups
drivers/pci/dwc/pci-layerscape.c | 90 ++++++++++++++++++----------------
drivers/pci/dwc/pcie-artpec6.c | 6 ---
drivers/pci/dwc/pcie-designware-host.c | 6 +++
drivers/pci/dwc/pcie-designware.h | 25 ++++++++++
drivers/pci/dwc/pcie-qcom.c | 17 -------
5 files changed, 80 insertions(+), 64 deletions(-)
--
2.1.0.27.g96db324
