Re: [PATCH v7 0/3] PCI: xilinx: Optimisation & MIPS support

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On Tue, Aug 15, 2017 at 12:11:14PM -0700, Paul Burton wrote:
> This series implements a couple of optimisations around interrupt
> handling for the Xilinx AXI PCIe Host Bridge IP, then enables building
> our driver for the MIPS architecture in order to make use of it on the
> MIPS Boston development board.
> 
> The INTD fix was moved out of this series in v7 and is now part of a
> "PCI: INTx interrupt fixes & cleanup" series which should be applied
> first in order to avoid hitting the broken INTD interrupt issue on MIPS
> Boston boards.
> 
> Applies atop v4.13-rc5, ideally after my "PCI: INTx interrupt fixes &
> cleanup" series.
> 
> Paul Burton (3):
>   PCI: xilinx: Unify INTx & MSI interrupt decode
>   PCI: xilinx: Don't enable config completion interrupts
>   PCI: xilinx: Allow build on MIPS platforms
> 
>  drivers/pci/host/Kconfig       |  2 +-
>  drivers/pci/host/pcie-xilinx.c | 53 ++++++++++++++----------------------------
>  2 files changed, 19 insertions(+), 36 deletions(-)

I tentatively applied these (and the other Xilinx patches) on
pci/host-xilinx.  I'd like to get maintainer acks for the whole shebang.

See https://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci.git/log/?h=pci/host-xilinx

Bjorn



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