This series fixes an issue found using INTx interrupts with the Xilinx AXI PCIe Host Bridge IP on the Imagination Technologies MIPS Boston development board, performs a couple of optimisations to interrupt handling & allows the driver to be used on MIPS systems. Applies atop v4.13-rc3. Paul Burton (6): PCI: Move enum pci_interrupt_pin to a new common header PCI: Introduce pci_irqd_intx_xlate() PCI: xilinx: Translate INTx range to hwirqs 0-3 PCI: xilinx: Unify INTx & MSI interrupt decode PCI: xilinx: Don't enable config completion interrupts PCI: xilinx: Allow build on MIPS platforms drivers/pci/host/Kconfig | 2 +- drivers/pci/host/pcie-xilinx.c | 58 +++++++++++++++--------------------------- include/linux/pci-common.h | 31 ++++++++++++++++++++++ include/linux/pci-epf.h | 9 +------ include/linux/pci.h | 33 ++++++++++++++++++++++++ 5 files changed, 87 insertions(+), 46 deletions(-) create mode 100644 include/linux/pci-common.h -- 2.13.4
