RE: Support SVM without PASID

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> From: Jean-Philippe Brucker
> Sent: Tuesday, August 1, 2017 4:26 PM
> 
> It depends what type you use when registering the IOMMU with
> VFIO_SET_IOMMU:
> 
> * If the type is VFIO_TYPE1v2_IOMMU, then
> VFIO_IOMMU_MAP/UNMAP_DMA
>   affects the stage-1 non-PASID context (already the case in mainline).
>   In addition, with my patch the BIND ioctl will affect stage-1 PASID
>   contexts, and bind process page directories to the device (host SVM).
> 
> * If the type is VFIO_TYPE1_NESTING_IOMMU, then
> VFIO_IOMMU_MAP/UNMAP_DMA
>   will affect stage-2 mappings (already in mainline).
>   With my SMMU patch series, the BIND ioctl is not supported in this mode.
>   But in the future, BIND would allow to manage stage-1 as well:
>   - bind a process page directory (host SVM with added stage-2), or

I thought host SVM will only go through VFIO_TYPE1v2_IOMMU,
since you said stage-2 in ARM SMMU is only for GPA->HPA usage
in previous explanation. then what does "host SVM with added 
stage-2" mean here?

>   - bind a guest page directory (viommu), or
>   - bind the full stage-1 context table (viommu).
> 
> Thanks,
> Jean




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