This patchset is trying to reconstruct PCIe and PCIe-PHY driver for rockchip platform in order to support per-lane PHY mode. And we could idle the inactive lane(s) finally. We deprecate the legacy PHY mode but the code could still support it in order not to break backware compatibility of DTB. And I organize the patches carefully so that we don't introduce git-bisect issue. Note that I carry on Jeffy's test tag from v2 as he has locally tested my v3 patchset. Changes in v3: - kill rockchip_pcie_manipulate_phys and related stuff - use phys array - improve the commit msg - remove unnecessary forward declaration - keep mutex inside struct rockchip_pcie_phy - fix wrong check of args number - move de-idle lanes after deasserting the reset - use cached lanes_map to avoid powering off inactive lanes twice - rename the commit tile Changes in v2: - deprecate legacy PHY model - improve rockchip_pcie_phy_of_xlate - fix wrong calculation of pwr_cnt and add new init_cnt - add internal locking - introduce per-lane data to simply the code Shawn Lin (7): PCI: rockchip: split out rockchip_pcie_get_phys PCI: rockchip: introduce per-lanes PHYs support phy: rockcip-pcie: reconstruct driver to support per-lane PHYs PCI: rockchip: idle the inactive PHY(s) arm64: dts: rockchip: convert PCIe to use per-lane PHYs for rk3339 dt-bindings: PCI: rockchip: convert to use per-lane PHY model dt-bindings: phy: convert to use per-lane Rockchip PCIe PHY .../devicetree/bindings/pci/rockchip-pcie.txt | 25 ++++- .../devicetree/bindings/phy/rockchip-pcie-phy.txt | 7 +- arch/arm64/boot/dts/rockchip/rk3399.dtsi | 8 +- drivers/pci/host/pcie-rockchip.c | 123 ++++++++++++++++---- drivers/phy/rockchip/phy-rockchip-pcie.c | 124 ++++++++++++++++++--- 5 files changed, 245 insertions(+), 42 deletions(-) -- 1.9.1
