On 7/11/2017 1:01 AM, Jerome Glisse wrote:
On Sun, Jul 09, 2017 at 08:45:57AM +0530, valmiki wrote:
Hi,
In SMMUv3 architecture document i see "PASIDs are optional,
configurable, and of a size determined by the minimum
of the endpoint".
So if PASID's are optional and not supported by PCIe end point, how SVM
can be achieved ?
It cannot be inferred from that statement that PASID support is not
required for SVM. AIUI, SVM is a software feature enabled by numerous
"optional" hardware features, including PASID. Features that are
optional per the hardware specification may be required for specific
software features. Thanks,
Thanks for the information Alex. Suppose if an End point doesn't support
PASID, is it still possible to achieve SVM ?
Are there any such features in SMMUv3 with which we can achieve it ?
You can achieve SVM in software, this is what HMM is for. But the hardware
must have an mmu with similar features as you get on CPU mmu. Device like
GPU do have such MMU.
You can also mix HMM with PASID/ATS to leverage device memory. HMM allows
you to use device memory inside process address space for device threads
(ie device memory is still consider as un-accessible from CPU, only device
can access it). Again very useful for GPU.
Thanks Jerome, this is interesting and great work. Will try to explore
more on this option.
Regards,
Valmiki
