Hi Joao, Thanks a lot for your comments! > -----Original Message----- > From: Joao Pinto [mailto:Joao.Pinto@xxxxxxxxxxxx] > Sent: 2017年7月6日 17:44 > To: Z.q. Hou <zhiqiang.hou@xxxxxxx>; linux-pci@xxxxxxxxxxxxxxx; > Joao.Pinto@xxxxxxxxxxxx > Cc: bhelgaas@xxxxxxxxxx; jingoohan1@xxxxxxxxx > Subject: Re: [PATCH 1/3] PCI: designware: add accessors for write permission > of DBI read-only registers > > > Hi Zhiqiang, > > Às 7:33 AM de 7/6/2017, Zhiqiang Hou escreveu: > > From: Hou Zhiqiang <Zhiqiang.Hou@xxxxxxx> > > > > The read-only DBI registers can be written over the DBI when set the > > "Write to RO Registers Using DBI" (DBI_RO_WR_EN) field of the > > MISC_CONTROL_1_OFF register. > > I would suggest you to add a cover-letter next time to explain the global > picture of the patch-set. Thanks, I will. > > I understand your need for this patch, but I don't agree on the approach. In the DWC common code, there is a function write a DBI read-only register 'Device class code', and the first 2 patches is to fix it. The 3rd patch is to refactor the Layerscape PCIe driver's host_init function and reuse the new added accessors. > Sometimes the people in charge of the hardware design / configuration, forget > to specify the device class and that can be problematic for some drivers, and > so the typical workaround is to set it in the driver using a quirk for example. > > You can see some examples here: > https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/ > pci/quirks.c I don't know the PCI quirks, do you mean remove the pci Device Class fix code from the DWC common code and add it to quirks? Thanks, Zhiqiang
