Re: [PATCH] efi/cper: Fix endianness of PCI class code

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On 05/11/2017 07:06 AM, Ard Biesheuvel wrote:
On 10 May 2017 at 09:41, Lukas Wunner <lukas@xxxxxxxxx> wrote:
On Wed, May 10, 2017 at 09:03:11AM +0100, Ard Biesheuvel wrote:
[...]

It seems clumsy and unnecessary to me so I'd prefer the bitfield.
Please excuse my stubbornness.


Stubbornness alone is not going to convince me. What *could* convince
me (although unlikely) is a quote from the C spec which explains why
it is 100% legal to make assumptions about how bitfields are projected
onto byte locations in memory.

I don't think you will find that in the C specifications.

Structure layout is specified per-architecture/per-ABI so for the Linux kernel you would only have to check that it is strongly specified and compatible across `ls arch | wc -l` different architectures. If you want to get started with MIPS, for example, you could look in the "SYSTEM V APPLICATION BINARY INTERFACE MIPS(r) RISC Processor Supplement 3rd Edition" starting on page 3-7. For x86 and arm{,64} I am sure you could find similar specifications.

David Daney





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