Re: [PATCH 1/1] PCI: Add MCFG quirk for 2nd node of Cavium ThunderX pass2.x host controller

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On Mon, Apr 24, 2017 at 4:34 AM, Robert Richter
<robert.richter@xxxxxxxxxx> wrote:
> On 21.04.17 11:56:14, Bjorn Helgaas wrote:
>> On Wed, Mar 29, 2017 at 02:16:13PM +0200, Tomasz Nowicki wrote:
>> > Currently SoCs pass2.x do not emulate EA headers for ACPI boot method at all.
>> > However, for pass2.x some devices (like EDAC) advertise incorrect base addresses
>> > in their BARs which results in driver probe failure during resource request.
>> > Since all problematic blocks are on 2nd NUMA node under domain 10 add necessary
>> > quirk entry to obtain BAR addresses correction using EA header emulation.
>> >
>> > Fixes: 44f22bd91e88 ("PCI: Add MCFG quirks for Cavium ThunderX pass2.x host controller")
>> > Signed-off-by: Tomasz Nowicki <tn@xxxxxxxxxxxx>
>> > CC: stable@xxxxxxxxxxxxxxx  # v4.10+
>>
>> Sorry Tomasz, I must have mistakenly marked this "accepted" in
>> patchwork, so it fell off my to-do list.  It's too late to get this in
>> v4.11, but I can still apply it for v4.12.
>>
>> I put it on my pci/host-thunder branch with Robert's ack.  I added a preceding
>> patch to tidy up whitespace, which makes this patch look like just:
>>
>>         /* SoC pass2.x */
>>         THUNDER_PEM_QUIRK(1, 0),
>>         THUNDER_PEM_QUIRK(1, 1),
>> +       THUNDER_ECAM_QUIRK(1, 10),
>>
>> Please double-check it to make sure this is what you need.
>
> Bjorn,
>
> since the second is marked stable there will be conflicts when
> applying it to stable (or built errors). The best would be to change
> order of both (128cd6e8249f^, 128cd6e8249f) for smooth backporting
> which makes it then more close to Tomasz's version again.

Thanks, I should have noticed that.  Could go either way; I just
marked 128cd6e8249f^ for stable as well, since it seemed marginally
easier to read to split the whitespace changes from the real change.

>> > ---
>> >  drivers/acpi/pci_mcfg.c | 7 ++++---
>> >  1 file changed, 4 insertions(+), 3 deletions(-)
>> >
>> > diff --git a/drivers/acpi/pci_mcfg.c b/drivers/acpi/pci_mcfg.c
>> > index a6a4cea..a0a391e 100644
>> > --- a/drivers/acpi/pci_mcfg.c
>> > +++ b/drivers/acpi/pci_mcfg.c
>> > @@ -90,13 +90,14 @@ static struct mcfg_fixup mcfg_quirks[] = {
>> >       &thunder_pem_ecam_ops, THUNDER_PEM_RES(0x894057000000UL, node) },  \
>> >     { "CAVIUM", "THUNDERX", rev, 9 + (10 * (node)), MCFG_BUS_ANY,       \
>> >       &thunder_pem_ecam_ops, THUNDER_PEM_RES(0x89808f000000UL, node) }
>> > +#define THUNDER_ECAM_QUIRK(rev, seg)                                       \
>> > +   { "CAVIUM", "THUNDERX", rev, seg, MCFG_BUS_ANY,                 \
>> > +   &pci_thunder_ecam_ops }
>> >     /* SoC pass2.x */
>> >     THUNDER_PEM_QUIRK(1, 0),
>> >     THUNDER_PEM_QUIRK(1, 1),
>> > +   THUNDER_ECAM_QUIRK(1, 10),
>> >
>> > -#define THUNDER_ECAM_QUIRK(rev, seg)                                       \
>> > -   { "CAVIUM", "THUNDERX", rev, seg, MCFG_BUS_ANY,                 \
>> > -   &pci_thunder_ecam_ops }
>> >     /* SoC pass1.x */
>> >     THUNDER_PEM_QUIRK(2, 0),        /* off-chip devices */
>> >     THUNDER_PEM_QUIRK(2, 1),        /* off-chip devices */
>> > --
>> > 2.7.4
>> >
> --
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