Am 13.03.2017 um 17:49 schrieb Andy Shevchenko:
On Mon, Mar 13, 2017 at 2:41 PM, Christian König <deathsimple@xxxxxxxxxxx> wrote:Most BIOS don't enable this because of compatibility reasons. Manually enable a 64bit BAR of 64GB size so that we have enough room for PCI devices. +static void pci_amd_enable_64bit_bar(struct pci_dev *dev) +{ + const uint64_t size = 64ULL * 1024 * 1024 * 1024;Perhaps extend <linux/sizes.h> and use SZ_64G here? It would be nice to do, since some of the drivers already are using sizes like 4GB and alike.
Actually using 64GB here was just for testing and to get some initial feedback.
I think we want to use all the remaining address space for PCIe, but for this we would need a new function in the resource management I think.
Going to take a deeper look when I'm sure we actually want this.
+ if (i == 8) + return; + + res = kzalloc(sizeof(*res), GFP_KERNEL); + res->flags = IORESOURCE_MEM | IORESOURCE_PREFETCH | IORESOURCE_MEM_64 | + IORESOURCE_WINDOW; + res->name = dev->bus->name; + r = allocate_resource(&iomem_resource, res, size, 0x100000000, + 0xfd00000000, size, NULL, NULL); + if (r) { + kfree(res); + return; + } + + base = ((res->start >> 8) & 0xffffff00) | 0x3; + limit = ((res->end + 1) >> 8) & 0xffffff00; + high = ((res->start >> 40) & 0xff) | + ((((res->end + 1) >> 40) & 0xff) << 16);Perhaps some of constants can be replaced by defines (I think some of them are already defined in ioport.h or somewhere else).
Yeah, good idea. But that stuff is purely AMD CPU specific, so won't belong into ioport.h or similar common code.
Does anybody have any idea where I could put this? Regards, Christian.
