> pci_root_ops is what is finally handed in to pci_scan_root_bus() as ops > argument for any bus segment no matter which type it is. mmconfig is only initialized after PCI is initialized (an ordering problem with ACPI). So it would require updating existing busses with likely interesting race conditions. There are also other ordering problems in the PCI layer, that is one of the reason early and raw PCI accesses even exist. > > The locking aspect is interesting as well. The type0/1 functions are having > their own internal locking. Oh, well. Right it could set lockless too. The internal locking is still needed because there are other users too. > What we really want is to differentiate bus segments. That means a PCIe > segment takes mmconfig ops and a PCI segment the type0/1 ops. That way we > can do what you suggested above, i.e. marking the ecam/mmconfig ops as > lockless. There's no need to separate PCIe and PCI. mmconfig has nothing to do with that. > Sure that's more work than just whacking a sloppy quirk into the code, but > the right thing to do. Before proposing grandiose plans it would be better if you acquired some basic understanding of the constraints this code is operating under first. -Andi
