From: David Miller > Sent: 06 February 2017 19:15 > From: David Laight <David.Laight@xxxxxxxxxx> > Date: Mon, 6 Feb 2017 17:23:54 +0000 > > > Although the 'store buffer' on the sparc cpus I used to use would > > let reads overtake writes. So you did have to read back the address > > of the last write - not sure about modern sparc cpus. > > Never would any sparc cpu do so when any of the operations involved > were to "side effect" locations, as PCI config space is. I guess they used non-zero ASI, and that forced the flush?? Normal uncached memory reads would overtake writes. (These were SuperSparc (Viking)). David
