On 09/12/16 02:07, Bharat Kumar Gogada wrote: >> On 08/12/16 18:33, Bharat Kumar Gogada wrote: >>>> On 08/12/16 15:29, Bharat Kumar Gogada wrote: >>>>> 218: 61 0 0 0 GICv2 81 Level mmc0 >>>>> 219: 0 0 0 0 GICv2 187 Level arm-smmu global fault >>>>> 220: 471 0 0 0 GICv2 53 Level xuartps >>>>> 223: 0 0 0 0 GICv2 154 Level fd4c0000.dma >>>>> 224: 3 0 0 0 dummy 1 Edge ath9k >>>> >>>> What is this "dummy" controller? And if that's supposed to be a >>>> legacy interrupt from the PCI device, it has the wrong trigger. >>> >>> Yes it is for legacy interrupt, wrong trigger means ? >> >> Aren't legacy interrupts supposed to be *level* triggered, and not edge? >> > Yes agreed. > For legacy interrupts im using irq_set_chained_handler_and_data so the irq line between bridge and GIC > Will not be shown here. The above how is virq for legacy, which is given by kernel, not sure why its state is set > to edge. Well, you should try and find out. Edge triggering for legacy interrupts is a real bug, and I don't think it has anything to do with arm64 (despite what the subject says). Thanks, M. -- Jazz is not dead. It just smells funny... -- To unsubscribe from this list: send the line "unsubscribe linux-pci" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
