Per TRM, we need to deassert the four reset pins simultaneously.
Currently the reset framework doesn't support that so we did it
one by one. It seems no side effect found but it does impact the
state machine of controller, so sometimes the change speed bit is
not setted when sending training sequence from recover state.
After the silicon RTL review from Soc guys, we don't need to do
the sequence recommended by TRM, and could just move the deassert
of mgmt_sticky_rst to the first place.
Signed-off-by: Shawn Lin <shawn.lin@xxxxxxxxxxxxxx>
---
drivers/pci/host/pcie-rockchip.c | 16 ++++++++++------
1 file changed, 10 insertions(+), 6 deletions(-)
diff --git a/drivers/pci/host/pcie-rockchip.c b/drivers/pci/host/pcie-rockchip.c
index c3593e6..5e51121 100644
--- a/drivers/pci/host/pcie-rockchip.c
+++ b/drivers/pci/host/pcie-rockchip.c
@@ -433,21 +433,25 @@ static int rockchip_pcie_init_port(struct rockchip_pcie *rockchip)
return err;
}
- err = reset_control_deassert(rockchip->core_rst);
+ /*
+ * Please don't reorder the deassert sequence of the following
+ * four reset pins.
+ */
+ err = reset_control_deassert(rockchip->mgmt_sticky_rst);
if (err) {
- dev_err(dev, "deassert core_rst err %d\n", err);
+ dev_err(dev, "deassert mgmt_sticky_rst err %d\n", err);
return err;
}
- err = reset_control_deassert(rockchip->mgmt_rst);
+ err = reset_control_deassert(rockchip->core_rst);
if (err) {
- dev_err(dev, "deassert mgmt_rst err %d\n", err);
+ dev_err(dev, "deassert core_rst err %d\n", err);
return err;
}
- err = reset_control_deassert(rockchip->mgmt_sticky_rst);
+ err = reset_control_deassert(rockchip->mgmt_rst);
if (err) {
- dev_err(dev, "deassert mgmt_sticky_rst err %d\n", err);
+ dev_err(dev, "deassert mgmt_rst err %d\n", err);
return err;
}
--
2.3.7
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